Journal Article PUBDB-2023-06729

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Monolithic MHz-frame rate digital SiPM-IC with sub-100 ps precision and 70$~\mu$m pixel pitch

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2024
Inst. of Physics London

Journal of Instrumentation 19(01), P01020 () [10.1088/1748-0221/19/01/P01020]
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Report No.: arXiv:2311.13220

Abstract: This paper presents the design and characterization of a monolithic integrated circuit (IC) including digital silicon photomultipliers (dSiPMs) arranged in a 32$~\times~$32 pixel matrix at 70$~\mu$m pitch. The IC provides per-quadrant time stamping and hit-map readout, and is fabricated in a standard 150-nm CMOS technology. Each dSiPM pixel consists of four single-photon avalanche diodes (SPADs) sharing a quenching and subsequent processing circuitry and has a fill factor of 30$~\%$. A sub-100$~$ps precision, 12-bit time-to-digital converter (TDC) provides timestamps per quadrant with an acquisition rate of 3$~$MHz. Together with the hit map, the total sustained data throughput of the IC amounts to 4$~$Gbps. Measurements obtained in a dark, temperature-stable environment as well as by using a pulsed laser environment show the full dSiPM-IC functionality. The dark-count rate (DCR) as function of the overvoltage and temperature, the TDC resolution, differential and integral nonlinearity (DNL/INL) as well as the propagation-delay variations across the matrix are presented. With aid of additional peripheral test structures, the main building blocks are characterized and key parameters are presented.

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Note: 16 pages, 13 figures, 1 table

Contributing Institute(s):
  1. Koordination Elektronik Entwicklung (FE)
  2. LHC/ATLAS Experiment (ATLAS)
  3. LHC/CMS Experiment (CMS)
Research Program(s):
  1. 611 - Fundamental Particles and Forces (POF4-611) (POF4-611)
Experiment(s):
  1. No specific instrument

Appears in the scientific report 2024
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 Record created 2023-11-09, last modified 2025-07-15