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Preprint | PUBDB-2025-02221 |
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2025
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Please use a persistent id in citations: doi:10.3204/PUBDB-2025-02221
Report No.: arXiv:2502.06573
Abstract: The high energy physics community recently gained access to the TPSCo 65 nm ISC (Image Sensor CMOS), which enables a higher in-pixel logic density in monolithic active pixel sensors (MAPS) compared to processes with larger feature sizes. To explore this novel technology, the Hybrid-to-Monolithic (H2M) test chip has been designed and manufactured. The design followed a digital-on-top design workflow and ports a hybrid pixel-detector architecture, with digital pulse processing in each pixel, into a monolithic chip. The chip matrix consists of 64$\times$16 square pixels with a size of 35$\times$35 um2, and a total active area of approximately 1.25 um2. The chip has been successfully integrated into the Caribou DAQ system. It is fully functional, and the measured threshold dispersion and noise agree with the expectation from front-end simulations. However, a non-uniform in-pixel response related to the size and location of the n-wells in the analog circuitry has been observed in test beam measurements and will be discussed in this contribution. This asymmetry in the pixel response, enhanced by the 35 um pixel pitch - larger than in other prototypes - and certain features of the readout circuit, has not been observed in prototypes with smaller pixel pitches in this technology.
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Journal Article/Contribution to a conference proceedings
The H2M Monolithic Active Pixel Sensor — characterizing non-uniform in-pixel response in a 65 nm CMOS imaging technology
Eleventh International Workshop on Semiconductor Pixel Detectors for Particles and Imaging , (PIXEL), StrasbourgStrasbourg, France, 18 Nov 2024 - 22 Nov 2024
Journal of Instrumentation 20(06), C06037 (2025) [10.1088/1748-0221/20/06/C06037]
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