Home > Publications database > The End-of-Substructure Card for the ATLAS ITk Strip Detector: Status of the Electronics Design and Results from Recent Quality Control Tests |
Contribution to a conference proceedings/Contribution to a book | PUBDB-2022-06902 |
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2021
IEEE
[Piscataway, NJ]
ISBN: 978-1-6654-2113-3
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Please use a persistent id in citations: doi:10.1109/NSS/MIC44867.2021.9875706
Abstract: The silicon tracker of the ATLAS experiment will be upgraded for the upcoming High-Luminosity Upgrade of the LHC (HL-LHC). The main building blocks of the new strip tracker are modules that consist of silicon sensors and read-out ASICs, the latter hosted on hybrid PCBs. Up to 14 modules are assembled on carbon-fibre substructures, commonly named staves in the central barrel region and petals in the two end-cap regions, for mechanical support. An End-of-Substructure (EoS) card is located at the end of each substructure and facilitates the transfer of data, power, and control signals between the modules and the off-detector systems. The module front-end ASICs transfer data (up to 28 differential lines at 640 MBit/s) to low-powered GigaBit Transceivers (lpGBT) ASICs on the EoS card. The lpGBT(s) provide data serialisation and use a 10 GBit/s versatile optical link plus transceiver (VTRx+) package to transmit signals to the off-detector systems. To meet the tight integration requirements in the detector, several EoS card designs have been realised. The produced prototypes have been populated with the currently available versions of the lpGBT and VTRx+ ASICs. Here, we present the current status of the EoS cards electronic design, results from extreme temperature, magnetic field and integration tests. Additionally, we discuss the results of detailed investigations into the optical signal quality and introduce a new eye-diagram extraction tool to be used in the Quality Control (QC) procedure that aims to ensure full functionality of the EoS card throughout the entire HL-LHC operation.
Keyword(s): CERN LHC Coll, upgrade ; detector, optical ; electronics, design ; semiconductor detector, microstrip ; electronics, readout ; semiconductor detector, hybrid ; integrated circuit ; quality ; tracking detector ; ATLAS ; silicon ; structure ; buildings ; temperature ; magnetic field ; tracks ; position sensitive ; ultraviolet ; imaging ; nucleus ; radiation detector ; Strips ; Ultraviolet sources ; Prototypes ; Quality control ; Detectors ; Optical detectors ; Optical imaging ; application specific integrated circuits ; nuclear electronics ; optical links ; particle tracks ; position sensitive particle detectors ; quality control ; readout electronics ; silicon radiation detectors ; transceivers ; End-of-Substructure card ; ATLAS ITk strip detector ; electronics design ; silicon tracker ; ATLAS experiment ; upcoming High-Luminosity Upgrade ; main building blocks ; strip tracker ; silicon sensors ; hybrid PCBs ; carbon-fibre substructures ; staves ; central barrel region ; end-cap regions ; control signals ; off-detector systems ; module front-end ASICs ; transfer data ; differential lines ; low-powered GigaBit Transceivers ASICs ; lpGBT ; data serialisation ; versatile optical link ; transceiver package ; EoS card designs ; VTRx+ ASICs ; EoS cards electronic design ; integration tests ; optical signal quality ; Quality Control procedure ; HL-LHC operation ; quality control tests
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