| Journal Article | PUBDB-2017-05045 |
; ; ;
1989
North-Holland Publ. Co.
Amsterdam
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Please use a persistent id in citations: doi:10.1016/0168-9002(89)90354-9
Abstract: A circuit is presented which uses FADCs for instantaneous time digitization at regular clock intervals. It allows the construction of pipeline TDCs with a resolution of a small fraction of the clock time. In measurements with a 100 MHz, 8-bit FADC a resolution of ≈ 30 ps has been obtained.
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