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| Home > Publications database > Design of a low dropout regulator in 45-nm CMOS technology |
| Master Thesis | PUBDB-2025-04780 |
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2025
Hamburg
Abstract: An integrated low dropout regulator was developed for an electronic photonic integrated circuit fabricated in 45 nm silicon on insulator complementary metal oxide semiconductor technology. The circuit supplies a local domain containing a 12.5 GHz voltage controlled oscillator, its driver, and the tuner path. A regulated replica architecture was employed to fix the dominant pole at an internal on chip node, improving stability and rejection without requiring a large external capacitor. The control path consists of a fast amplifier shaping the midband response and a slow amplifier regulating the replica node with a defined pole in the hundreds of kHz range. A compact modelling and transistor level design flow was used to define amplifier gain and bandwidth targets and to validate loop behavior with a realistic VCO. Several fast amplifier topologies were implemented. A basic single stage, a self biased stage, and three feedforward versions with one half, one quarter, and one eighth scaling. The slow amplifier employed a symmetric input and an explicit output capacitor to anchor the internal pole. Simulation results confirmed 1.00 V regulation with minimal deviation across process corners and stable operation with phase margins above 80◦. Feedforward structures improved power supply rejection by nearly 20 dB in the midband, while maintaining predictable phase behavior. Jitter sensitivity tests on the 12.5 GHz oscillator under a 20 mV sinusoidal disturbance showed a reduction by approximately a factor of two relative to single pole regulation and more than an order of magnitude compared to an unregulated rail. The results demonstrate that a regulated replica loop with feedforward current injection enables compact, low noise regulation suitable for high frequency EPIC systems.
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