guest ::
| Home > Publications database > A front-end circuit for a Monolithic Active Pixel Sensor in 65-nm CMOS Technology > print |
| Home > Publications database > A front-end circuit for a Monolithic Active Pixel Sensor in 65-nm CMOS Technology > print |
| 001 | 617750 | ||
| 005 | 20250715171349.0 | ||
| 024 | 7 | _ | |a 10.1109/NSS/MIC/RTSD57108.2024.10657527 |2 doi |
| 024 | 7 | _ | |2 openalex |a openalex:W4402834278 |
| 037 | _ | _ | |a PUBDB-2024-07028 |
| 041 | _ | _ | |a English |
| 100 | 1 | _ | |a Reckleben, Christian |0 P:(DE-H253)PIP1001714 |b 0 |e Corresponding author |u desy |
| 111 | 2 | _ | |a IEEE Nuclear Science Symposium |c Tampa |d 2024-10-26 - 2024-11-02 |w FL |
| 245 | _ | _ | |a A front-end circuit for a Monolithic Active Pixel Sensor in 65-nm CMOS Technology |
| 260 | _ | _ | |c 2024 |
| 336 | 7 | _ | |a Conference Paper |0 33 |2 EndNote |
| 336 | 7 | _ | |a INPROCEEDINGS |2 BibTeX |
| 336 | 7 | _ | |a conferenceObject |2 DRIVER |
| 336 | 7 | _ | |a CONFERENCE_POSTER |2 ORCID |
| 336 | 7 | _ | |a Output Types/Conference Poster |2 DataCite |
| 336 | 7 | _ | |a Poster |b poster |m poster |0 PUB:(DE-HGF)24 |s 1738069789_2504916 |2 PUB:(DE-HGF) |
| 502 | _ | _ | |c DESY |
| 520 | _ | _ | |a This work presents an analog front-end circuitry implemented in a monolithic active pixel sensor (MAPS) fabricated in a 65-nm CMOS imaging technology. It combines the low-capacitance collection electrode (< 2 fF) and an analog processor featuring a charge-sensitive amplifier (CSA) driving a fast continuous-time threshold comparator. The CSA features a gain stage along with a Krummenacher-type feedback network. Its gain approximately amounts to 130 µV/e- and provides a rise time of 5 ns. The negative feedback provides leakage current compensation of the sensor diode and a continuous linear discharge of the feedback capacitor. This implements a time-over-threshold (ToT) measurement in combination with the comparator. Threshold voltage and Krummenacher-bias current can be adjusted pixel wise by using a 4-bit and 3-bit DAC, respectively. The prototype shows an input referred noise charge smaller than 35 e-rms. It takes an overall area of 500 µm2, the power consumption is less than 4 µW at a power supply of 1.2 V. Beside design aspects electrical and spectral characterization of a small pixel matrix will be shown in this work. |
| 536 | _ | _ | |a 622 - Detector Technologies and Systems (POF4-622) |0 G:(DE-HGF)POF4-622 |c POF4-622 |f POF IV |x 0 |
| 588 | _ | _ | |a Dataset connected to CrossRef Conference |
| 693 | _ | _ | |a DESY II |f DESY: TestBeamline 21 |1 EXP:(DE-H253)DESYII-20150101 |0 EXP:(DE-H253)TestBeamline21-20150101 |6 EXP:(DE-H253)TestBeamline21-20150101 |x 0 |
| 700 | 1 | _ | |a Hansen, Karsten |0 P:(DE-H253)PIP1003149 |b 1 |u desy |
| 700 | 1 | _ | |a Mulyanto, Budi |0 P:(DE-H253)PIP1097737 |b 2 |u desy |
| 700 | 1 | _ | |a Chauhan, Ankur |0 P:(DE-H253)PIP1093241 |b 3 |u desy |
| 773 | _ | _ | |a 10.1109/NSS/MIC/RTSD57108.2024.10657527 |
| 856 | 4 | _ | |u https://bib-pubdb1.desy.de/record/617750/files/A_front-end_circuit_for_a_Monolithic_Active_Pixel_Sensor_in_65-nm_CMOS_Technology.pdf |y Restricted |
| 856 | 4 | _ | |u https://bib-pubdb1.desy.de/record/617750/files/A_front-end_circuit_for_a_Monolithic_Active_Pixel_Sensor_in_65-nm_CMOS_Technology.pdf?subformat=pdfa |x pdfa |y Restricted |
| 909 | C | O | |o oai:bib-pubdb1.desy.de:617750 |p VDB |
| 910 | 1 | _ | |a Deutsches Elektronen-Synchrotron |0 I:(DE-588b)2008985-5 |k DESY |b 0 |6 P:(DE-H253)PIP1001714 |
| 910 | 1 | _ | |a Deutsches Elektronen-Synchrotron |0 I:(DE-588b)2008985-5 |k DESY |b 1 |6 P:(DE-H253)PIP1003149 |
| 910 | 1 | _ | |a Deutsches Elektronen-Synchrotron |0 I:(DE-588b)2008985-5 |k DESY |b 2 |6 P:(DE-H253)PIP1097737 |
| 910 | 1 | _ | |a Deutsches Elektronen-Synchrotron |0 I:(DE-588b)2008985-5 |k DESY |b 3 |6 P:(DE-H253)PIP1093241 |
| 913 | 1 | _ | |a DE-HGF |b Forschungsbereich Materie |l Materie und Technologie |1 G:(DE-HGF)POF4-620 |0 G:(DE-HGF)POF4-622 |3 G:(DE-HGF)POF4 |2 G:(DE-HGF)POF4-600 |4 G:(DE-HGF)POF |v Detector Technologies and Systems |x 0 |
| 914 | 1 | _ | |y 2024 |
| 920 | 1 | _ | |0 I:(DE-H253)FE-20120731 |k FE |l Koordination Elektronik Entwicklung |x 0 |
| 980 | _ | _ | |a poster |
| 980 | _ | _ | |a VDB |
| 980 | _ | _ | |a I:(DE-H253)FE-20120731 |
| 980 | _ | _ | |a UNRESTRICTED |
| Library | Collection | CLSMajor | CLSMinor | Language | Author |
|---|