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000617750 041__ $$aEnglish
000617750 1001_ $$0P:(DE-H253)PIP1001714$$aReckleben, Christian$$b0$$eCorresponding author$$udesy
000617750 1112_ $$aIEEE Nuclear Science Symposium$$cTampa$$d2024-10-26 - 2024-11-02$$wFL
000617750 245__ $$aA front-end circuit for a Monolithic Active Pixel Sensor in 65-nm CMOS Technology
000617750 260__ $$c2024
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000617750 520__ $$aThis work presents an analog front-end circuitry implemented in a monolithic active pixel sensor (MAPS) fabricated in a 65-nm CMOS imaging technology. It combines the low-capacitance collection electrode (< 2 fF) and an analog processor featuring a charge-sensitive amplifier (CSA) driving a fast continuous-time threshold comparator. The CSA features a gain stage along with a Krummenacher-type feedback network. Its gain approximately amounts to 130 µV/e- and provides a rise time of 5 ns. The negative feedback provides leakage current compensation of the sensor diode and a continuous linear discharge of the feedback capacitor. This implements a time-over-threshold (ToT) measurement in combination with the comparator. Threshold voltage and Krummenacher-bias current can be adjusted pixel wise by using a 4-bit and 3-bit DAC, respectively. The prototype shows an input referred noise charge smaller than 35 e-rms. It takes an overall area of 500 µm2, the power consumption is less than 4 µW at a power supply of 1.2 V. Beside design aspects electrical and spectral characterization of a small pixel matrix will be shown in this work.
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000617750 7001_ $$0P:(DE-H253)PIP1003149$$aHansen, Karsten$$b1$$udesy
000617750 7001_ $$0P:(DE-H253)PIP1097737$$aMulyanto, Budi$$b2$$udesy
000617750 7001_ $$0P:(DE-H253)PIP1093241$$aChauhan, Ankur$$b3$$udesy
000617750 773__ $$a10.1109/NSS/MIC/RTSD57108.2024.10657527
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000617750 9141_ $$y2024
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