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@TECHREPORT{Pozniak:408703,
      author       = {Pozniak, Krzysztof},
      title        = {{INTERNAL} {INTERFACE}, {I}/{O} {C}ommunication with {FPGA}
                      {C}ircuits and {H}ardware {D}escription {S}tandard for
                      {A}pplications in {HEP} and {FEL} {E}lectronics ver. 1.0},
      number       = {TESLA 2005-22},
      reportid     = {PUBDB-2018-03052, TESLA 2005-22. DESY-TESLA-2005-22},
      series       = {TESLA Reports 2005},
      pages        = {63},
      year         = {2005},
      abstract     = {The work describes hardware layer of the universal,
                      parameterized communication interfacefor application in the
                      FPGA chips. The interface is called in this work as the
                      „Internal Interface” orin short the “II”. The paper
                      shows how to automatically create the address and data
                      space,according to the user declarations. The methods to
                      standardize the I/O communication withFPGA chips are
                      described. The communication uses library functions and
                      standardized,parametric components in VHDL. Theoretical
                      background and technical description of theInternal
                      Interface are illustrated with a few easy examples of simple
                      interfaces.The name of „Internal Interface” is used by
                      the author and the Warsaw ELHEP ResearchGroup since 2000 for
                      the description of then newly introduced I/O communication
                      standardbetween the user and the FPGA chip. The Internal
                      Interface communication standard has been applied since its
                      first introduction in:• Muon and Energy Trigger for
                      Backing Calorimeter (BAC) in ZEUS experiment (AHDL version)
                      [11],• RPC Muon Trajectory Pattern Comparator Electronics
                      for Compact Muon Solenoid (CMS) inCERN [15],• TESLA Low
                      Level RF Control electronics for TTF II and VUV FEL, as well
                      as for X-RayFEL studies [17-22],• Warsaw ELHEP Laboratory
                      on Electronics for High Energy Physics Experiments for
                      teaching purposes and FPGA electronics development [10] in
                      WUT,• WARSAW CMS Laboratory, for CMS electronics
                      development [14] in the Institute ofExperimental Physics,
                      WU.},
      keywords     = {fast logic (INSPIRE) / integrated circuit (INSPIRE) /
                      programming (INSPIRE) / RF system: control system (INSPIRE)
                      / free electron laser (INSPIRE) / DESY Lab (INSPIRE) / FPGA
                      (autogen) / FPGA I/O (autogen) / VHDL (autogen) / Altera
                      (autogen) / Xilinx (autogen) / communication interface
                      (autogen) / behavioral programming (autogen) / FPGA systems
                      parameterization and standardization (autogen) / FPGA based
                      systems for HEP experiments (autogen) / multi-FPGA systems
                      (autogen)},
      typ          = {PUB:(DE-HGF)3 / PUB:(DE-HGF)29},
      doi          = {10.3204/PUBDB-2018-03052},
      url          = {https://bib-pubdb1.desy.de/record/408703},
}